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The-OpenROAD-Project / OpenLane

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

Verilog 820 287 Built by @agorararmard @ax3ghazy @donn @antonblanchard @tgingold 1 star today